diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/config.mk ./root/u-boot-2009.03-stars625/board/samsung/mini2440/config.mk --- ./root/u-boot-2009.03/board/samsung/mini2440/config.mk 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/config.mk 2009-05-21 22:08:34.000000000 +0800 @@ -0,0 +1,26 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, +# David Mueller, ELSOFT AG, +# +# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu +# +# see http://www.samsung.com/ for more information on SAMSUNG +# + +# +# SMDK2410 has 1 bank of 64 MB DRAM +# +# 3000'0000 to 3400'0000 +# +# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 +# optionally with a ramdisk at 3080'0000 +# +# we load ourself to 33F8'0000 +# +# download area is 3300'0000 +# + + +TEXT_BASE = 0x33F80000 +#TEXT_BASE = 0x30000000 diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/flash.c ./root/u-boot-2009.03-stars625/board/samsung/mini2440/flash.c --- ./root/u-boot-2009.03/board/samsung/mini2440/flash.c 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/flash.c 2009-05-20 08:06:48.000000000 +0800 @@ -0,0 +1,433 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Alex Zuepke + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +ulong myflush (void); + + +#define FLASH_BANK_SIZE PHYS_FLASH_SIZE +#define MAIN_SECT_SIZE 0x10000 /* 64 KB */ + +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; + + +#define CMD_READ_ARRAY 0x000000F0 +#define CMD_UNLOCK1 0x000000AA +#define CMD_UNLOCK2 0x00000055 +#define CMD_ERASE_SETUP 0x00000080 +#define CMD_ERASE_CONFIRM 0x00000030 +#define CMD_PROGRAM 0x000000A0 +#define CMD_UNLOCK_BYPASS 0x00000020 + +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1))) + +#define BIT_ERASE_DONE 0x00000080 +#define BIT_RDY_MASK 0x00000080 +#define BIT_PROGRAM_ERROR 0x00000020 +#define BIT_TIMEOUT 0x80000000 /* our flag */ + +#define READY 1 +#define ERR 2 +#define TMO 4 + +/*----------------------------------------------------------------------- + */ + +ulong flash_init (void) +{ + int i, j; + ulong size = 0; + + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_info[i].flash_id = +#if defined(CONFIG_AMD_LV400) + (AMD_MANUFACT & FLASH_VENDMASK) | + (AMD_ID_LV400B & FLASH_TYPEMASK); +#elif defined(CONFIG_AMD_LV800) + (AMD_MANUFACT & FLASH_VENDMASK) | + (AMD_ID_LV800B & FLASH_TYPEMASK); +#else +#error "Unknown flash configured" +#endif + flash_info[i].size = FLASH_BANK_SIZE; + flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; + memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + for (j = 0; j < flash_info[i].sector_count; j++) { + if (j <= 3) { + /* 1st one is 16 KB */ + if (j == 0) { + flash_info[i].start[j] = + flashbase + 0; + } + + /* 2nd and 3rd are both 8 KB */ + if ((j == 1) || (j == 2)) { + flash_info[i].start[j] = + flashbase + 0x4000 + (j - + 1) * + 0x2000; + } + + /* 4th 32 KB */ + if (j == 3) { + flash_info[i].start[j] = + flashbase + 0x8000; + } + } else { + flash_info[i].start[j] = + flashbase + (j - 3) * MAIN_SECT_SIZE; + } + } + size += flash_info[i].size; + } + + flash_protect (FLAG_PROTECT_SET, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, + &flash_info[0]); + + flash_protect (FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (AMD_MANUFACT & FLASH_VENDMASK): + printf ("AMD: "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case (AMD_ID_LV400B & FLASH_TYPEMASK): + printf ("1x Amd29LV400BB (4Mbit)\n"); + break; + case (AMD_ID_LV800B & FLASH_TYPEMASK): + printf ("1x Amd29LV800BB (8Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + goto Done; + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + + Done:; +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + ushort result; + int iflag, cflag, prot, sect; + int rc = ERR_OK; + int chip; + + /* first look for protection bits */ + + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; + + if ((s_first < 0) || (s_first > s_last)) { + return ERR_INVAL; + } + + if ((info->flash_id & FLASH_VENDMASK) != + (AMD_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + vu_short *addr = (vu_short *) (info->start[sect]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + *addr = CMD_ERASE_CONFIRM; + + /* wait until flash is ready */ + chip = 0; + + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > + CONFIG_SYS_FLASH_ERASE_TOUT) { + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + chip = TMO; + break; + } + + if (!chip + && (result & 0xFFFF) & BIT_ERASE_DONE) + chip = READY; + + if (!chip + && (result & 0xFFFF) & BIT_PROGRAM_ERROR) + chip = ERR; + + } while (!chip); + + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + + if (chip == ERR) { + rc = ERR_PROG_ERROR; + goto outahere; + } + if (chip == TMO) { + rc = ERR_TIMOUT; + goto outahere; + } + + printf ("ok.\n"); + } else { /* it was protected */ + + printf ("protected!\n"); + } + } + + if (ctrlc ()) + printf ("User Interrupt!\n"); + + outahere: + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_hword (flash_info_t * info, ulong dest, ushort data) +{ + vu_short *addr = (vu_short *) dest; + ushort result; + int rc = ERR_OK; + int cflag, iflag; + int chip; + + /* + * Check if Flash is (sufficiently) erased + */ + result = *addr; + if ((result & data) != data) + return ERR_NOT_ERASED; + + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS; + *addr = CMD_PROGRAM; + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait until flash is ready */ + chip = 0; + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + chip = ERR | TMO; + break; + } + if (!chip && ((result & 0x80) == (data & 0x80))) + chip = READY; + + if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) { + result = *addr; + + if ((result & 0x80) == (data & 0x80)) + chip = READY; + else + chip = ERR; + } + + } while (!chip); + + *addr = CMD_READ_ARRAY; + + if (chip == ERR || *addr != data) + rc = ERR_PROG_ERROR; + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong cp, wp; + int l; + int i, rc; + ushort data; + + wp = (addr & ~1); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + for (; i < 2 && cnt > 0; ++i) { + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; + } + for (; cnt == 0 && i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + if ((rc = write_hword (info, wp, data)) != 0) { + return (rc); + } + wp += 2; + } + + /* + * handle word aligned part + */ + while (cnt >= 2) { + data = *((vu_short *) src); + if ((rc = write_hword (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 0) { + return ERR_OK; + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); + --cnt; + } + for (; i < 2; ++i, ++cp) { + data = (data >> 8) | (*(uchar *) cp << 8); + } + + return write_hword (info, wp, data); +} diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/lowlevel_init.S ./root/u-boot-2009.03-stars625/board/samsung/mini2440/lowlevel_init.S --- ./root/u-boot-2009.03/board/samsung/mini2440/lowlevel_init.S 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/lowlevel_init.S 2009-05-20 08:06:48.000000000 +0800 @@ -0,0 +1,167 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include +#include + + +/* some parameters for the board */ + +/* + * + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S + * + * Copyright (C) 2002 Samsung Electronics SW.LEE + * + */ + +#define BWSCON 0x48000000 + +/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3) + +#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32) + +/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */ + +/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0 + +#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0 + +#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */ + +#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */ + +#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */ + +#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */ + +#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */ + +/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +/**************************************/ + +_TEXT_BASE: + .word TEXT_BASE + +.globl lowlevel_init +lowlevel_init: + /* memory control configuration */ + /* make r0 relative the current location so that it */ + /* reads SMRDATA out of FLASH rather than memory ! */ + ldr r0, =SMRDATA + ldr r1, _TEXT_BASE + sub r0, r0, r1 + ldr r1, =BWSCON /* Bus Width Status Controller */ + add r2, r0, #13*4 +0: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r2, r0 + bne 0b + + /* everything is fine now */ + mov pc, lr + + .ltorg +/* the literal pools origin */ + +SMRDATA: + .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) + .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) + .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) + .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) + .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) + .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + .word 0x30 + .word 0x30 diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/Makefile ./root/u-boot-2009.03-stars625/board/samsung/mini2440/Makefile --- ./root/u-boot-2009.03/board/samsung/mini2440/Makefile 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/Makefile 2009-05-20 08:07:21.000000000 +0800 @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := mini2440.o flash.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/mini2440.c ./root/u-boot-2009.03-stars625/board/samsung/mini2440/mini2440.c --- ./root/u-boot-2009.03/board/samsung/mini2440/mini2440.c 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/mini2440.c 2009-05-21 22:15:29.000000000 +0800 @@ -0,0 +1,121 @@ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#if 1 //chg by stars625 for mini2440 : Clock + +#define M_MDIV 0x7F //405MHz +#define M_PDIV 0x2 +#define M_SDIV 0x1 + +#define U_M_MDIV 0x38 //48MHz +#define U_M_PDIV 0x2 +#define U_M_SDIV 0x2 + +#else + +#define FCLK_SPEED 1 + +#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif + +#define USB_CLOCK 1 + +#if USB_CLOCK==0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK==1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif + +#endif + +static inline void delay (unsigned long loops) +{ + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b":"=r" (loops):"0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +int board_init (void) +{ + S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + + /* to reduce PLL lock time, adjust the LOCKTIME register */ + clk_power->LOCKTIME = 0xFFFFFF; + + /* configure MPLL */ + clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); + + /* some delay between MPLL and UPLL */ + delay (4000); + + /* configure UPLL */ + clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); + + /* some delay between MPLL and UPLL */ + delay (8000); + + /* set up the I/O ports */ + gpio->GPACON = 0x007FFFFF; +#if 1 //chg by stars625 for mini2440 + gpio->GPBCON = 0x00295551; +#else + gpio->GPBCON = 0x00044555; +#endif + gpio->GPBUP = 0x000007FF; + gpio->GPCCON = 0xAAAAAAAA; + gpio->GPCUP = 0x0000FFFF; + gpio->GPDCON = 0xAAAAAAAA; + gpio->GPDUP = 0x0000FFFF; + gpio->GPECON = 0xAAAAAAAA; + gpio->GPEUP = 0x0000FFFF; + gpio->GPFCON = 0x000055AA; + gpio->GPFUP = 0x000000FF; + gpio->GPGCON = 0xFF95FFBA; + gpio->GPGUP = 0x0000FFFF; + gpio->GPHCON = 0x002AFAAA; + gpio->GPHUP = 0x000007FF; + + /* arch number of SMDK2410-Board */ + +#if 1 //chg by stars625 for mini2440 + gd->bd->bi_arch_number = MACH_TYPE_S3C2440; + gpio->GPBDAT = 0x00000180; +#else + gd->bd->bi_arch_number = MACH_TYPE_SMDK2410; +#endif + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x30000100; + + icache_enable(); + dcache_enable(); + + return 0; +} + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} diff -uaNr ./root/u-boot-2009.03/board/samsung/mini2440/u-boot.lds ./root/u-boot-2009.03-stars625/board/samsung/mini2440/u-boot.lds --- ./root/u-boot-2009.03/board/samsung/mini2440/u-boot.lds 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/board/samsung/mini2440/u-boot.lds 2009-05-20 08:06:48.000000000 +0800 @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + _end = .; +} diff -uaNr ./root/u-boot-2009.03/common/serial.c ./root/u-boot-2009.03-stars625/common/serial.c --- ./root/u-boot-2009.03/common/serial.c 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/common/serial.c 2009-05-21 08:02:18.000000000 +0800 @@ -58,7 +58,7 @@ #else return &serial0_device; #endif -#elif defined(CONFIG_S3C2410) +#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 #if defined(CONFIG_SERIAL1) return &s3c24xx_serial0_device; #elif defined(CONFIG_SERIAL2) @@ -131,7 +131,7 @@ #if defined (CONFIG_STUART) serial_register(&serial_stuart_device); #endif -#if defined(CONFIG_S3C2410) +#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 serial_register(&s3c24xx_serial0_device); serial_register(&s3c24xx_serial1_device); serial_register(&s3c24xx_serial2_device); diff -uaNr ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/interrupts.c ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/interrupts.c --- ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/interrupts.c 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/interrupts.c 2009-05-21 08:09:20.000000000 +0800 @@ -1,41 +1,11 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Alex Zuepke - * - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ #include -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 #include #if defined(CONFIG_S3C2400) #include -#elif defined(CONFIG_S3C2410) +#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 #include #endif @@ -178,7 +148,8 @@ tbclk = timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ - defined(CONFIG_VCMA9) + defined(CONFIG_MINI2440) || \ + defined(CONFIG_VCMA9) //chg by stars625 for mini2440 tbclk = CONFIG_SYS_HZ; #else # error "tbclk not configured" diff -uaNr ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/serial.c ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/serial.c --- ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/serial.c 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/serial.c 2009-05-21 22:15:42.000000000 +0800 @@ -1,29 +1,10 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ #include -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 #if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB) #include -#elif defined(CONFIG_S3C2410) +#elif defined(CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 #include #endif @@ -135,6 +116,12 @@ #endif _serial_setbrg(dev_index); +#if 1 //add by stars625 for mini2440 + + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + gpio->GPBDAT = 0x00000100; + +#endif return (0); } diff -uaNr ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/speed.c ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/speed.c --- ./root/u-boot-2009.03/cpu/arm920t/s3c24x0/speed.c 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/cpu/arm920t/s3c24x0/speed.c 2009-05-21 22:31:03.000000000 +0800 @@ -1,28 +1,3 @@ -/* - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ /* This code should work for both the S3C2400 and the S3C2410 * as they seem to have the same PLL and clock machinery inside. @@ -30,11 +5,11 @@ */ #include -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 #if defined(CONFIG_S3C2400) #include -#elif defined(CONFIG_S3C2410) +#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 #include #endif @@ -67,7 +42,14 @@ p = ((r & 0x003F0) >> 4) + 2; s = r & 0x3; +#if 1 //chg by stars625 for mini2440 + if(pllreg == MPLL) + return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s)); + else + return((CONFIG_SYS_CLK_FREQ * m) / (p << s)); +#else return((CONFIG_SYS_CLK_FREQ * m) / (p << s)); +#endif } /* return FCLK frequency */ @@ -79,9 +61,12 @@ /* return HCLK frequency */ ulong get_HCLK(void) { +#if 1 //chg by stars625 for mini2440 + return(get_FCLK()/4); +#else S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); - return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK()); +#endif } /* return PCLK frequency */ diff -uaNr ./root/u-boot-2009.03/cpu/arm920t/start.S ./root/u-boot-2009.03-stars625/cpu/arm920t/start.S --- ./root/u-boot-2009.03/cpu/arm920t/start.S 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/cpu/arm920t/start.S 2009-05-21 21:52:48.000000000 +0800 @@ -1,32 +1,10 @@ -/* - * armboot - Startup Code for ARM920 CPU-core - * - * Copyright (c) 2001 Marius Gröger - * Copyright (c) 2002 Alex Züpke - * Copyright (c) 2002 Gary Jennejohn - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ #include #include + +#if 0 //del by xx for mini2440 #include +#endif /* ************************************************************************* @@ -115,8 +93,10 @@ orr r0,r0,#0xd3 msr cpsr,r0 +#if 0 //del by xx for mini2440 bl coloured_LED_init bl red_LED_on +#endif #if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) /* @@ -132,7 +112,7 @@ bne copyex #endif -#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) +#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 /* turn off the watchdog */ # if defined(CONFIG_S3C2400) @@ -156,17 +136,39 @@ mov r1, #0xffffffff ldr r0, =INTMSK str r1, [r0] -# if defined(CONFIG_S3C2410) - ldr r1, =0x3ff +# if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 + ldr r1, =0x7fff //chg by stars625 for mini2440 : 0x3ff -> 0x7fff ldr r0, =INTSUBMSK str r1, [r0] # endif +#if 1 //chg by stars625 for mini2440 + +#define MPLLCON 0x4C000004 +#define UPLLCON 0x4C000008 + + ldr r0, =UPLLCON //USB Clock 48MHz + ldr r1, =0x38022 + str r1, [r0] + + ldr r0, =MPLLCON //SYS Clock 405MHz + ldr r1, =0x7f021 + str r1, [r0] + + ldr r0, =CLKDIVN //FCLK:HCLK:PCLK = 1:4:8 + mov r1, #5 + str r1, [r0] + +#else + /* FCLK:HCLK:PCLK = 1:2:4 */ /* default FCLK is 120 MHz ! */ ldr r0, =CLKDIVN mov r1, #3 str r1, [r0] + +#endif + #endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */ /* @@ -216,6 +218,26 @@ cmp r0, r1 ble clbss_l +#if 1 //add by stars625 for mini2440 : led1 + +#define GPBCON 0x56000010 +#define GPBDAT 0x56000014 +#define GPBUP 0x56000018 + + ldr r0, =GPBUP + ldr r1, =0x7FF + str r1, [r0] + + ldr r0, =GPBCON + ldr r1, =0x154FF + str r1, [r0] + + ldr r0, =GPBDAT + ldr r1, =0x1C0 + str r1, [r0] + +#endif + ldr pc, _start_armboot _start_armboot: .word start_armboot diff -uaNr ./root/u-boot-2009.03/drivers/rtc/s3c24x0_rtc.c ./root/u-boot-2009.03-stars625/drivers/rtc/s3c24x0_rtc.c --- ./root/u-boot-2009.03/drivers/rtc/s3c24x0_rtc.c 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/drivers/rtc/s3c24x0_rtc.c 2009-05-20 22:42:05.000000000 +0800 @@ -32,7 +32,7 @@ #if defined(CONFIG_S3C2400) #include -#elif defined(CONFIG_S3C2410) +#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) //chg by stars625 for mini2440 #include #endif diff -uaNr ./root/u-boot-2009.03/include/common.h ./root/u-boot-2009.03-stars625/include/common.h --- ./root/u-boot-2009.03/include/common.h 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/include/common.h 2009-05-21 08:13:32.000000000 +0800 @@ -498,7 +498,8 @@ ulong get_PCI_freq (void); #endif #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || \ - defined(CONFIG_LH7A40X) || defined(CONFIG_S3C6400) + defined(CONFIG_LH7A40X) || defined(CONFIG_S3C6400) || \ + defined(CONFIG_S3C2440) void s3c2410_irq(void); #define ARM920_IRQ_CALLBACK s3c2410_irq ulong get_FCLK (void); diff -uaNr ./root/u-boot-2009.03/include/configs/mini2440.h ./root/u-boot-2009.03-stars625/include/configs/mini2440.h --- ./root/u-boot-2009.03/include/configs/mini2440.h 1970-01-01 08:00:00.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/include/configs/mini2440.h 2009-05-21 22:09:02.000000000 +0800 @@ -0,0 +1,160 @@ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2410 SoC */ +#define CONFIG_MINI2440 1 /* on a SAMSUNG SMDK2410 Board */ + +/* input clock of PLL */ +#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */ + +/* for dram debug */ +#define CONFIG_SKIP_LOWLEVEL_INIT +//#define CONFIG_SKIP_RELOCATE_UBOOT + +#define USE_920T_MMU 1 +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ +#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ +#define CS8900_BASE 0x19000300 +#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */ + +/************************************************************ + * RTC + ************************************************************/ +#define CONFIG_RTC_S3C24X0 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_ELF + + +#define CONFIG_BOOTDELAY 3 +/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ +/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b */ +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.1.230 +#define CONFIG_SERVERIP 192.168.1.1 +/*#define CONFIG_BOOTFILE "elinos-lart" */ +/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */ + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +/* what's this ? it's not used anywhere */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "MINI2440 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ + +/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ +/* it to wrap 100 times (total 1562500) to get 1 sec. */ +#define CONFIG_SYS_HZ 1562500 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ + +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ + +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */ +#if 0 +#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ +#endif + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#ifdef CONFIG_AMD_LV800 +#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ +#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ +#endif +#ifdef CONFIG_AMD_LV400 +#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ +#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ +#endif + +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ + +#endif /* __CONFIG_H */ diff -uaNr ./root/u-boot-2009.03/include/s3c24x0.h ./root/u-boot-2009.03-stars625/include/s3c24x0.h --- ./root/u-boot-2009.03/include/s3c24x0.h 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/include/s3c24x0.h 2009-05-20 21:52:18.000000000 +0800 @@ -1,25 +1,3 @@ -/* - * (C) Copyright 2003 - * David Müller ELSOFT AG Switzerland. d.mueller@elsoft.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ /************************************************ * NAME : s3c24x0.h @@ -82,7 +60,7 @@ S3C24X0_REG32 PRIORITY; S3C24X0_REG32 INTPND; S3C24X0_REG32 INTOFFSET; -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 SUBSRCPND; S3C24X0_REG32 INTSUBMSK; #endif @@ -92,11 +70,11 @@ /* DMAS (see manual chapter 8) */ typedef struct { S3C24X0_REG32 DISRC; -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 DISRCC; #endif S3C24X0_REG32 DIDST; -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 DIDSTC; #endif S3C24X0_REG32 DCON; @@ -107,7 +85,7 @@ #ifdef CONFIG_S3C2400 S3C24X0_REG32 res[1]; #endif -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 res[7]; #endif } /*__attribute__((__packed__))*/ S3C24X0_DMA; @@ -145,7 +123,7 @@ S3C24X0_REG32 res[8]; S3C24X0_REG32 DITHMODE; S3C24X0_REG32 TPAL; -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 LCDINTPND; S3C24X0_REG32 LCDSRCPND; S3C24X0_REG32 LCDINTMSK; @@ -401,7 +379,7 @@ S3C24X0_REG32 MISCCR; S3C24X0_REG32 EXTINT; #endif -#ifdef CONFIG_S3C2410 +#if defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) //chg by stars625 for mini2440 S3C24X0_REG32 GPACON; S3C24X0_REG32 GPADAT; S3C24X0_REG32 res1[2]; diff -uaNr ./root/u-boot-2009.03/include/serial.h ./root/u-boot-2009.03-stars625/include/serial.h --- ./root/u-boot-2009.03/include/serial.h 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/include/serial.h 2009-05-21 07:58:41.000000000 +0800 @@ -36,7 +36,7 @@ #endif -#if defined(CONFIG_S3C2410) +#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) extern struct serial_device s3c24xx_serial0_device; extern struct serial_device s3c24xx_serial1_device; extern struct serial_device s3c24xx_serial2_device; diff -uaNr ./root/u-boot-2009.03/Makefile ./root/u-boot-2009.03-stars625/Makefile --- ./root/u-boot-2009.03/Makefile 2009-03-22 05:04:41.000000000 +0800 +++ ./root/u-boot-2009.03-stars625/Makefile 2009-05-20 08:08:59.000000000 +0800 @@ -2830,6 +2830,9 @@ smdk2410_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0 +mini2440_config : + @$(MKCONFIG) $(@:_config=) arm arm920t mini2440 samsung s3c24x0 + SX1_stdout_serial_config \ SX1_config: unconfig @mkdir -p $(obj)include